By: Umesh Sisodia, Circuitsutra Technologies Pvt Ltd; Swaminathan Ramachandran, Circuitsutra Technologies Pvt Ltd
The term ‘Electronics System Level (ESL)’ have been used in the industry for nearly two decades now. Different people use it in different context, with different meanings. It can be primarily generalized as the collection of methodologies that enables ‘Hardware-Software Co-Design’ and ‘Raising the abstraction of chip design above RTL’. ESL methodologies are not supposed to replace the traditional RTL-GDS flow, but rather co-exist with existing flow and augment it to perform various advanced activities which are not feasible with traditional flow. It enables Pre-Silicon firmware development, Architecture exploration to optimize power & performance early in the cycle at system level, High-Level Synthesis (HLS), SoC Level simulation, System level simulation, Hardware-Software co-design and co-verification. In this workshop we will briefly touch upon various use cases of ESL methodologies and discuss the best practices being used in the industry.