Functional SoC and Early Firmware Verification Using a Virtual Realization Layer


Date: March 1st 
Time: 13:30-14:30 PST
Registration Access Level: ALL-ACCESS 

By: Adnan Hamid, Breker Verification Systems

SoC Verification has become more important in recent years. However, this task is challenging given the increased complexity of UVM for larger systems, emulation usage and the need to drive processors as part of the system. This tutorial will provide a methodology using a virtual realization layer, as suggested by the PSS committee, which can perform various OS-like capabilities while streamlining hardware verification tool usage. It may also be used to aid firmware verification with the hardware.

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