Program Grid

This schedule is tentative and subject to change. 

All times are in PST. 

PST Zoom Room #1 Zoom Room #2 Zoom Room #3 Zoom Room #4
9:00 - 10:00


 

Tutorial: Portable Stimulus 2.0 Is Here: What You Need to Know
(Presented by members of Accellera’s Portable Stimulus Working Group

Workshop: UVM-SystemC Randomization - Updates from the SystemC Verification Working Group
(Presented by members of Accellera’s SystemC Verification Working Group
Workshop: Getting to Know Accellera’s Emerging Hardware Security Standard: Security Annotation for Electronic Design Integration (Presented by members of Accellera’s IP Security Assurance Working Group)   Workshop: System-Level Power Analysis with IEEE 2416 Power Models
(IEEE) 

10:00 - 11:00

 

 

 

     
11:00 - 11:30 Break
11:30 - 12:30 Workshop: UVM-AMS: A UVM-Based Analog Verification Standard
(Presented by members of Accellera’s UVM-AMS Working Group)
 
Workshop: Multi Language Verification Framework Standardization and Demo
(Presented by members of Accellera’s Multi-Language Working Group
 
Workshop: An Introduction to the Accellera Functional Safety Working Group Standardization Effort
(Presented by members of Accellera’s Functional Safety Working Group) 
 
 
12:30 - 13:30 Lunch Break
13:30 - 14:30 Workshop: Verification of Functional Safety for an Automotive Ai Processor
(Veriest Solutions)
Workshop: Early Design and Validation of an Ai Accelerator’s System Level Performance Using an HLS Design Methodology
(Siemens Digital Industries Software)
Workshop: Functional SoC and Early Firmware Verification Using a Virtual Realization Layer
(Breker Verification Systems)
 
14:30 - 15:00 Break 
15:00 - 16:00 Workshop: Harmonizing Hardware and Software – Inside the Engineer’s Head
(Semifore)
Workshop: Smarter Verification Management
(Cadence Design Systems)
Workshop: Achieving ISO 26262 ASIL Metrics Using Modern Static and Dynamic Failure Mode Fault Analysis
(Optima Design Automation) 
 
16:00 - 17:00 Networking / Exhibit Hall Open

 

PST Zoom Room #1 Zoom Room #2 Zoom Room #3 Zoom Room #4 Zoom Room #5 Zoom Room #6
8:00 - 8:30  Opening Session
8:30 - 9:00 Break
9:00 - 10:30 Debug Analysis 1 Portable Stimulus Verification Languages      
10:30 - 12:00 CDC HW/SW Co-Verification Modeling and Patterns Prototyping and Emulation Verification Methodologies Verification Processes 
12:00 - 13:00 Lunch Break
13:00 - 14:15 Keynote: Dr Paul Cunningham 
14:00 - 17:00 Networking / Exhibit Hall Open
15:00 - 17:00  Advanced Methodologies 1 Advanced Methodologies 2 UVM and RISC-V      

 

PST Zoom Room #1 Zoom Room #2 Zoom Room #3
8: 30 - 9:30 Verification in the Open-Source Era
9:30 - 10:00 Break
10:00 - 12:00 Automation using Machine Learning Formal Verification Mixed-Signal Design
12:00 - 13:00 Lunch Break
13:00 - 14:00 Chip Design on Cloud - from Pipe Dream to Preeminence?
14:00 -17:00 Networking / Exhibit Hall Open
15:00 - 16:30  Debug Analysis 2 Low Power Design and Verification Verification Potpourri
16:45 - 17:00  Best Paper Presentation 
17:00 - 18:00 Networking / Exhibit Hall Open

 

PST Zoom Room #1 Zoom Room #2 Zoom Room #3

9:00 - 11:00

 

 

 

 

 

Tutorial: Raising the Verification Bar: Cloud based Simulation Increases Verification Efficiency 
(Synopsys, Inc.) 

 

Tutorial: Applying Big Data to Next-Generation Coverage Analysis and Closure
(Siemens Digital Industries Software

 

Tutorial: Benefits of a Common Methodology for Emulation and Prototyping
(Cadence Design Systems)

11:00 - 11:30 Break
11:30 - 12:30 Workshop: RISC-V Based SoC Design, Verification, and Validation in One Hour
(Agnisys, Inc.) 
Workshop: Functional debug: Verification and Beyond
(Siemens Digital Industries Software)
Workshop: Accelerate Signoff with JasperGold RTL Designer Apps
(Cadence Design Systems) 
12:30 - 13:30 Exhibits Open 
13:30 - 14:30 Workshop: Beyond Bug Hunting: Verification Coverage from Safety to Certification 
(OneSpin Solutions) 
Workshop: Shift Left: Cloud As the Technology Platform to Enable Faster Verification 
(Google, LLC) 
Workshop: Fast Forward Your Product Launch Using Shift Left - Hardware-Software co-Design & co-Verification Using ESL Methodologies
(Circuitsutra Technologies Pvt Ltd)